Techniques to improving timing

There are several methods can be used to improve timing.
1. Move critical signal close to output of a gate, this may be used in ECO phase.
2. Move critical signal closer to the output

3. Replicate logic
4. Use Complex Gate

5. Retiming – move logic to next T

6. Retiming - move Logic to prev T

7. Clock Gating

8. Additional methods
1）Use Low Vt cell to improve timing

2）Size up weak gates in the path